On Mon, 24 Nov 2014, Leon Alrae wrote:
> All the patches up to this one have been applied to mips-next branch
> (available at git://github.com/lalrae/qemu.git), thanks. I'll go through
> the remaining soon.
Thanks. I am now back from a week's vacation and will continue posting
outstanding chan
On 12/11/2014 15:21, Maciej W. Rozycki wrote:
> Fix microMIPS MOVE16 and MOVEP instructions on 64-bit processors by
> using register addition operations.
>
> This copies the approach taken with MIPS16 MOVE instructions (I8_MOV32R
> and I8_MOVR32 opcodes) and follows the observation that OPC_ADDU
On Thu, 13 Nov 2014, Leon Alrae wrote:
> It might be a good idea to split these changes into separate patches to
> have more precise indication about touched subsystem (even though all
> the changes were done in MIPS context). For example "target-mips" and
> "linux-user" rather than just "mips".
On 12/11/2014 18:46, Maciej W. Rozycki wrote:
> On Wed, 12 Nov 2014, Andreas Färber wrote:
>
>> Please consistently use "target-mips: " when that's what you're
>> touching. (For hw/mips/ it's less consistent what to use.)
>
> Sure. What about MIPS changes that span files contained within
> tar
On Wed, 12 Nov 2014, Andreas Färber wrote:
> Please consistently use "target-mips: " when that's what you're
> touching. (For hw/mips/ it's less consistent what to use.)
Sure. What about MIPS changes that span files contained within
target-mips/ and elsewhere? I have such changes in my queue.
Hi Maciej,
Please consistently use "target-mips: " when that's what you're
touching. (For hw/mips/ it's less consistent what to use.)
Leon, please sanitize subjects before sending them out, it makes them
easier to skim in git-log and cgit.
Thanks,
Andreas
--
SUSE LINUX GmbH, Maxfeldstr. 5, 904
Fix microMIPS MOVE16 and MOVEP instructions on 64-bit processors by
using register addition operations.
This copies the approach taken with MIPS16 MOVE instructions (I8_MOV32R
and I8_MOVR32 opcodes) and follows the observation that OPC_ADDU expands
to tcg_gen_mov_tl whenever `rt' is 0 and `rs'
