Hi,
Am 2018-07-31 11:50, schrieb BALATON Zoltan:
On Tue, 31 Jul 2018, Sebastian Bauer wrote:
There is also the possibility to make the special (num-irqs == 1) the
common case, as the Sam460ex platform is the only user of this bus so
far (and probably stays the only one). I'm not sure if it is
On Tue, 31 Jul 2018, Sebastian Bauer wrote:
There is also the possibility to make the special (num-irqs == 1) the common
case, as the Sam460ex platform is the only user of this bus so far (and
probably stays the only one). I'm not sure if it is worth all the hassle.
I'd vote for this as I've
On Tue, Jul 31, 2018 at 06:57:31AM +0200, Sebastian Bauer wrote:
> Am 2018-07-31 02:18, schrieb David Gibson:
> > > David, can you please drop this patch, we'll come up with a
> > > different fix.
> > Done. Should have looked at that patch a bit closer.
>
> I created a follow up patch,
Am 2018-07-31 01:15, schrieb Peter Maydell:
It would work. But creating an OR gate is half a dozen lines or so of
code, so it's not much more work than changing the PCI controller.
So we should prefer whichever is closest to what the real hardware
does, assuming we can determine that.
The real
Am 2018-07-31 02:18, schrieb David Gibson:
David, can you please drop this patch, we'll come up with a different
fix.
Done. Should have looked at that patch a bit closer.
I created a follow up patch, unfortunately, based on the previous patch,
as I did not spot your mail earlier than now.
On Tue, Jul 31, 2018 at 01:31:46AM +0200, BALATON Zoltan wrote:
> On Tue, 31 Jul 2018, Peter Maydell wrote:
> > On 30 July 2018 at 23:37, BALATON Zoltan wrote:
> > QEMU's implementation of qemu_irq signal lines is that the destination
> > end provides the qemu_irq, which under the hood is a
On Tue, 31 Jul 2018, Peter Maydell wrote:
On 30 July 2018 at 23:37, BALATON Zoltan wrote:
QEMU's implementation of qemu_irq signal lines is that the destination
end provides the qemu_irq, which under the hood is a pointer to a
struct containing a pointer to the function in the destination
On 31 July 2018 at 00:00, BALATON Zoltan wrote:
> On Mon, 30 Jul 2018, Peter Maydell wrote:
>>
>> On 30 July 2018 at 12:06, BALATON Zoltan wrote:
>>> I don't understand QOM. Does this really work? It will ultimately do
>>>
>>> qdev_connect_gpio_out_named(dev, SYSBUS_DEVICE_GPIO_IRQ, 0,
On Mon, 30 Jul 2018, Peter Maydell wrote:
On 30 July 2018 at 12:06, BALATON Zoltan wrote:
On Mon, 30 Jul 2018, Sebastian Bauer wrote:
The four interrupts of the PCI bus are connected to the same UIC pin on
the
real Sam460ex. Evidence for this can be found in the UBoot source for the
Sam460ex
On 30 July 2018 at 23:37, BALATON Zoltan wrote:
> I think the number of irq lines could be set, the functions have an nirq or
> num_irq parameters so the 4 lines is only assumed because PCI defines that
> and this is what's modelled but we could use different value here. Sam460ex
> seems to
On 30 July 2018 at 12:06, BALATON Zoltan wrote:
> On Mon, 30 Jul 2018, Sebastian Bauer wrote:
>>
>> The four interrupts of the PCI bus are connected to the same UIC pin on
>> the
>> real Sam460ex. Evidence for this can be found in the UBoot source for the
>> Sam460ex in the Sam460ex.c file where
On Mon, 30 Jul 2018, Sebastian Bauer wrote:
Am 2018-07-30 13:06, schrieb BALATON Zoltan:
On Mon, 30 Jul 2018, Sebastian Bauer wrote:
The four interrupts of the PCI bus are connected to the same UIC pin on
the
real Sam460ex. Evidence for this can be found in the UBoot source for the
Sam460ex
Am 2018-07-30 13:06, schrieb BALATON Zoltan:
On Mon, 30 Jul 2018, Sebastian Bauer wrote:
The four interrupts of the PCI bus are connected to the same UIC pin
on the
real Sam460ex. Evidence for this can be found in the UBoot source for
the
Sam460ex in the Sam460ex.c file where
On Mon, 30 Jul 2018, Sebastian Bauer wrote:
The four interrupts of the PCI bus are connected to the same UIC pin on the
real Sam460ex. Evidence for this can be found in the UBoot source for the
Sam460ex in the Sam460ex.c file where PCI_INTERRUPT_LINE in written. This
change brings the connection
On Mon, Jul 30, 2018 at 06:39:04AM +0200, Sebastian Bauer wrote:
> The four interrupts of the PCI bus are connected to the same UIC pin on the
> real Sam460ex. Evidence for this can be found in the UBoot source for the
> Sam460ex in the Sam460ex.c file where PCI_INTERRUPT_LINE in written. This
>
The four interrupts of the PCI bus are connected to the same UIC pin on the
real Sam460ex. Evidence for this can be found in the UBoot source for the
Sam460ex in the Sam460ex.c file where PCI_INTERRUPT_LINE in written. This
change brings the connection in line with this.
This fixes the problem
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