On Fri, Oct 10, 2014 at 8:57 PM, Peter Maydell wrote:
> The ARM ARM requires that the FPINST and FPINST2 VFP control
> registers are not accessible to code at EL0. We were already
> correctly implementing this for reads of these registers; add
> the missing check for the write code path.
>
> Signe
The ARM ARM requires that the FPINST and FPINST2 VFP control
registers are not accessible to code at EL0. We were already
correctly implementing this for reads of these registers; add
the missing check for the write code path.
Signed-off-by: Peter Maydell
---
target-arm/translate.c | 3 +++
1 fi
