Re: [Qemu-devel] [PATCH] tcg/ppc64: Fix zero extension code generation bug for ppc64 host

2011-09-09 Thread malc
On Fri, 9 Sep 2011, David Gibson wrote: > From: Thomas Huth > > The ppc64 code generation backend uses an rldicr (Rotate Left Double > Immediate and Clear Right) instruction to implement zero extension of > a 32 bit quantity to a 64 bit quantity (INDEX_op_ext32u_i64). However > this is wrong -

Re: [Qemu-devel] [PATCH] tcg/ppc64: Fix zero extension code generation bug for ppc64 host

2011-09-09 Thread Alexander Graf
On 09.09.2011, at 07:58, David Gibson wrote: > From: Thomas Huth > > The ppc64 code generation backend uses an rldicr (Rotate Left Double > Immediate and Clear Right) instruction to implement zero extension of > a 32 bit quantity to a 64 bit quantity (INDEX_op_ext32u_i64). However > this is wr

[Qemu-devel] [PATCH] tcg/ppc64: Fix zero extension code generation bug for ppc64 host

2011-09-08 Thread David Gibson
From: Thomas Huth The ppc64 code generation backend uses an rldicr (Rotate Left Double Immediate and Clear Right) instruction to implement zero extension of a 32 bit quantity to a 64 bit quantity (INDEX_op_ext32u_i64). However this is wrong - this instruction clears specified low bits of the val