The parallel NOR flash models don't have a specific maintainer and
default to the 'Block layer core' section.
Step in to maintain them.
The section still get covered by the Block layer team, but the idea
is to offload them.
The two devices are very similar (same technology), the difference
is mostly the protocol to access them.
Amusingly, between the two devices, the 'CFI01' which is used in
enterprise grade products on ARM/X86 archs is the one that received
the less care, while the 'CFI02' used by hobbyist boards is the
more reliable.
To some extent I plan to re-unify the models, and improve testing.
I'm looking for co-maintainers or designated reviewers.
(I asked Stephen Checkoway for help but unfortunately he can't).
Any volunteer?
Regards,
Phil.
PD: I Cc'ed all the people who made sinificant modification in the
devices the last few years.
Philippe Mathieu-Daudé (1):
MAINTAINERS: Add an entry for the Parallel NOR Flash devices
MAINTAINERS | 7 +++++++
1 file changed, 7 insertions(+)
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2.20.1
