Hello, this series adds basic checks (privilege level, address validity, windowed register validation) to all cache opcodes. This improves emulation quality and allows to debug cache-related issues that happen on real hardware.
Max Filippov (6): target-xtensa: add RRRI4 opcode format fields target-xtensa: add basic checks to dcache opcodes target-xtensa: add basic checks to icache opcodes target-xtensa: add overridable test_init macro target-xtensa: allow using core configuration in tests target-xtensa: add basic tests for cache opcodes target-xtensa/helper.h | 1 + target-xtensa/op_helper.c | 5 ++ target-xtensa/translate.c | 74 +++++++++++++++++++++++++++++ tests/tcg/xtensa/Makefile | 12 +++-- tests/tcg/xtensa/macros.inc | 6 +++ tests/tcg/xtensa/test_b.S | 2 +- tests/tcg/xtensa/test_bi.S | 2 +- tests/tcg/xtensa/test_boolean.S | 2 +- tests/tcg/xtensa/test_break.S | 2 +- tests/tcg/xtensa/test_bz.S | 2 +- tests/tcg/xtensa/test_cache.S | 97 +++++++++++++++++++++++++++++++++++++++ tests/tcg/xtensa/test_clamps.S | 2 +- tests/tcg/xtensa/test_extui.S | 2 +- tests/tcg/xtensa/test_fail.S | 2 +- tests/tcg/xtensa/test_interrupt.S | 2 +- tests/tcg/xtensa/test_loop.S | 2 +- tests/tcg/xtensa/test_mac16.S | 2 +- tests/tcg/xtensa/test_max.S | 2 +- tests/tcg/xtensa/test_min.S | 2 +- tests/tcg/xtensa/test_mmu.S | 6 +-- tests/tcg/xtensa/test_mul16.S | 2 +- tests/tcg/xtensa/test_mul32.S | 2 +- tests/tcg/xtensa/test_nsa.S | 2 +- tests/tcg/xtensa/test_pipeline.S | 2 +- tests/tcg/xtensa/test_quo.S | 2 +- tests/tcg/xtensa/test_rem.S | 2 +- tests/tcg/xtensa/test_rst0.S | 2 +- tests/tcg/xtensa/test_s32c1i.S | 2 +- tests/tcg/xtensa/test_sar.S | 2 +- tests/tcg/xtensa/test_sext.S | 2 +- tests/tcg/xtensa/test_shift.S | 2 +- tests/tcg/xtensa/test_sr.S | 2 +- tests/tcg/xtensa/test_timer.S | 2 +- tests/tcg/xtensa/test_windowed.S | 2 +- 34 files changed, 221 insertions(+), 34 deletions(-) create mode 100644 tests/tcg/xtensa/test_cache.S -- 1.8.1.4