Re: [Qemu-devel] [PATCH 02/13] target/ppc: Use atomic load for LQ and LQARX

2018-06-28 Thread David Gibson
On Thu, Jun 28, 2018 at 08:22:38AM -0700, Richard Henderson wrote: > On 06/27/2018 08:49 PM, David Gibson wrote: > >> +/* High part of 128-bit helper return. */ > >> +uint64_t retxh; > >> + > > > > Adding a temporary here is kind of gross. I guess the helper > > interface doesn't allow f

Re: [Qemu-devel] [PATCH 02/13] target/ppc: Use atomic load for LQ and LQARX

2018-06-28 Thread Richard Henderson
On 06/27/2018 08:49 PM, David Gibson wrote: >> +/* High part of 128-bit helper return. */ >> +uint64_t retxh; >> + > > Adding a temporary here is kind of gross. I guess the helper > interface doesn't allow for 128-bit returns, but couldn't you pass a > register number into the helper and

Re: [Qemu-devel] [PATCH 02/13] target/ppc: Use atomic load for LQ and LQARX

2018-06-27 Thread David Gibson
On Tue, Jun 26, 2018 at 09:19:10AM -0700, Richard Henderson wrote: > Section 1.4 of the Power ISA v3.0B states that both of these > instructions are single-copy atomic. As we cannot (yet) issue > 128-bit loads within TCG, use the generic helpers provided. > > Since TCG cannot (yet) return a 128-b

[Qemu-devel] [PATCH 02/13] target/ppc: Use atomic load for LQ and LQARX

2018-06-26 Thread Richard Henderson
Section 1.4 of the Power ISA v3.0B states that both of these instructions are single-copy atomic. As we cannot (yet) issue 128-bit loads within TCG, use the generic helpers provided. Since TCG cannot (yet) return a 128-bit value, add a slot within CPUPPCState for returning the high half of a 128-