Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Peter Maydell
On 20 December 2013 16:57, Richard Henderson wrote: > On 12/20/2013 08:52 AM, Peter Maydell wrote: >> Were you planning to review patches 12 ("Remove >> ARMCPU/CPUARMState from cpregs APIs used by decoder") >> and 19 ("Widen exclusive-access support struct fields >> to 64 bits") ? I think those ar

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Richard Henderson
On 12/20/2013 08:52 AM, Peter Maydell wrote: > Were you planning to review patches 12 ("Remove > ARMCPU/CPUARMState from cpregs APIs used by decoder") > and 19 ("Widen exclusive-access support struct fields > to 64 bits") ? I think those are the only two patches in > this set which I don't either h

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Peter Maydell
On 20 December 2013 16:44, Richard Henderson wrote: > On 12/20/2013 08:29 AM, Peter Maydell wrote: >> On 20 December 2013 16:26, Richard Henderson wrote: >>> On 12/20/2013 08:08 AM, Peter Maydell wrote: > In particular, opc = 2 && size = 2 should be unallocated. This is LDRSW (immed

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Richard Henderson
On 12/20/2013 08:29 AM, Peter Maydell wrote: > On 20 December 2013 16:26, Richard Henderson wrote: >> On 12/20/2013 08:08 AM, Peter Maydell wrote: In particular, opc = 2 && size = 2 should be unallocated. >>> >>> This is LDRSW (immediate), not unallocated, isn't it? >>> >>> I agree the decode

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Peter Maydell
On 20 December 2013 16:26, Richard Henderson wrote: > On 12/20/2013 08:08 AM, Peter Maydell wrote: >>> In particular, opc = 2 && size = 2 should be unallocated. >> >> This is LDRSW (immediate), not unallocated, isn't it? >> >> I agree the decode logic isn't laid out the same as the ARM ARM, >> but

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Richard Henderson
On 12/20/2013 08:08 AM, Peter Maydell wrote: >> In particular, opc = 2 && size = 2 should be unallocated. > > This is LDRSW (immediate), not unallocated, isn't it? > > I agree the decode logic isn't laid out the same as the ARM ARM, > but I'm pretty sure it's correct. Oops, typo: opc=3 && size=2

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-20 Thread Peter Maydell
On 19 December 2013 17:46, Richard Henderson wrote: > On 12/17/2013 07:12 AM, Peter Maydell wrote: >> +if (size == 3 && opc == 2) { >> +/* PRFM - prefetch */ >> +return; >> +} >> +if (opc == 3 && size > 1) { >> +unallocated_encoding(s); >

Re: [Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-19 Thread Richard Henderson
On 12/17/2013 07:12 AM, Peter Maydell wrote: > +if (size == 3 && opc == 2) { > +/* PRFM - prefetch */ > +return; > +} > +if (opc == 3 && size > 1) { > +unallocated_encoding(s); > +return; > +} > +is_store = (opc

[Qemu-devel] [PATCH 02/21] target-arm: A64: add support for ld/st unsigned imm

2013-12-17 Thread Peter Maydell
From: Alex Bennée This adds support for the forms of ld/st with a 12 bit unsigned immediate offset. Signed-off-by: Alex Bennée Signed-off-by: Peter Maydell --- target-arm/translate-a64.c | 89 +- 1 file changed, 88 insertions(+), 1 deletion(-) diff