Re: [Qemu-devel] [PATCH 03/18] target-riscv: Add initialization for translation

2016-09-26 Thread Richard Henderson
On 09/26/2016 03:56 AM, Sagar Karandikar wrote: RISCVCPU *cpu_riscv_init(const char *cpu_model) { -return NULL; +RISCVCPU *cpu; +CPURISCVState *env; +const riscv_def_t *def; + +def = cpu_riscv_find_by_name(cpu_model); +if (!def) { +return NULL; +} +cpu =

[Qemu-devel] [PATCH 03/18] target-riscv: Add initialization for translation

2016-09-26 Thread Sagar Karandikar
Add tcg and cpu model initialization Add gen_intermediate_code function, dummy decode_opc Add exception helpers necessary for gen_intermediate_code Signed-off-by: Sagar Karandikar --- target-riscv/helper.h| 4 + target-riscv/op_helper.c | 26 + target-riscv/translate.c | 244 +