Signed-off-by: Richard Henderson <r...@twiddle.net>
---
target-s390x/insn-data.def | 6 ++++++
target-s390x/translate.c | 38 +++++++++++++-------------------------
2 files changed, 19 insertions(+), 25 deletions(-)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 95f9987..745d1e6 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -175,6 +175,9 @@
/* EXECUTE RELATIVE LONG */
C(0xc600, EXRL, RIL_b, EE, r1_o, ri2, 0, 0, ex, 0)
+/* EXTRACT FPC */
+ C(0xb38c, EFPC, RRE, Z, 0, 0, new, r1_32, efpc, 0)
+
/* INSERT CHARACTER */
C(0x4300, IC, RX_a, Z, 0, m2_8u, 0, r1_8, mov2, 0)
C(0xe373, ICY, RXY_a, LD, 0, m2_8u, 0, r1_8, mov2, 0)
@@ -395,6 +398,9 @@
/* STORE HALFWORD RELATIVE LONG */
C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0)
+/* STORE FPC */
+ C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0)
+
/* STORE MULTIPLE */
D(0x9000, STM, RS_a, Z, 0, a2, 0, 0, stm, 0, 4)
D(0xeb90, STMY, RSY_a, LD, 0, a2, 0, 0, stm, 0, 4)
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 698cb99..439a90d 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -1833,12 +1833,6 @@ static void disas_b3(DisasContext *s, int op, int m3,
int r1, int r2)
tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
tcg_temp_free_i32(tmp32_1);
break;
- case 0x8c: /* EFPC R1 [RRE] */
- tmp32_1 = tcg_temp_new_i32();
- tcg_gen_ld_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
- store_reg32(r1, tmp32_1);
- tcg_temp_free_i32(tmp32_1);
- break;
case 0x94: /* CEFBR R1,R2 [RRE] */
case 0x95: /* CDFBR R1,R2 [RRE] */
case 0x96: /* CXFBR R1,R2 [RRE] */
@@ -1990,7 +1984,7 @@ static void disas_b9(DisasContext *s, int op, int r1, int
r2)
static void disas_s390_insn(DisasContext *s)
{
- TCGv_i64 tmp, tmp2;
+ TCGv_i64 tmp;
TCGv_i32 tmp32_1, tmp32_2;
unsigned char opc;
uint64_t insn;
@@ -2003,24 +1997,7 @@ static void disas_s390_insn(DisasContext *s)
case 0xb2:
insn = ld_code4(s->pc);
op = (insn >> 16) & 0xff;
- switch (op) {
- case 0x9c: /* STFPC D2(B2) [S] */
- d2 = insn & 0xfff;
- b2 = (insn >> 12) & 0xf;
- tmp32_1 = tcg_temp_new_i32();
- tmp = tcg_temp_new_i64();
- tmp2 = get_address(s, 0, b2, d2);
- tcg_gen_ld_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc));
- tcg_gen_extu_i32_i64(tmp, tmp32_1);
- tcg_gen_qemu_st32(tmp, tmp2, get_mem_index(s));
- tcg_temp_free_i32(tmp32_1);
- tcg_temp_free_i64(tmp);
- tcg_temp_free_i64(tmp2);
- break;
- default:
- disas_b2(s, op, insn);
- break;
- }
+ disas_b2(s, op, insn);
break;
case 0xb3:
insn = ld_code4(s->pc);
@@ -2723,6 +2700,12 @@ static ExitStatus op_divu64(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_efpc(DisasContext *s, DisasOps *o)
+{
+ tcg_gen_ld32u_i64(o->out, cpu_env, offsetof(CPUS390XState, fpc));
+ return NO_EXIT;
+}
+
static ExitStatus op_ex(DisasContext *s, DisasOps *o)
{
/* ??? Perhaps a better way to implement EXECUTE is to set a bit in
@@ -3620,6 +3603,11 @@ static void wout_m1_64(DisasContext *s, DisasFields *f,
DisasOps *o)
tcg_gen_qemu_st64(o->out, o->addr1, get_mem_index(s));
}
+static void wout_m2_32(DisasContext *s, DisasFields *f, DisasOps *o)
+{
+ tcg_gen_qemu_st32(o->out, o->in2, get_mem_index(s));
+}
+
/* ====================================================================== */
/* The "INput 1" generators. These load the first operand to an insn. */
--
1.7.11.4
