Re: [Qemu-devel] [PATCH 06/15] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked

2014-09-09 Thread Greg Bellows
On 26 August 2014 06:47, Sergey Fedorov wrote: > On 22.08.2014 14:29, Fabian Aggeler wrote: > > ICDDCR/GICD_CTLR is banked in GICv1 implementations with Security > > Extensions or in GICv2 in independent from Security Extensions. > > This makes it possible to enable forwarding of interrupts from

Re: [Qemu-devel] [PATCH 06/15] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked

2014-08-26 Thread Sergey Fedorov
On 22.08.2014 14:29, Fabian Aggeler wrote: > ICDDCR/GICD_CTLR is banked in GICv1 implementations with Security > Extensions or in GICv2 in independent from Security Extensions. > This makes it possible to enable forwarding of interrupts from > Distributor to the CPU interfaces for Group0 and Group1

[Qemu-devel] [PATCH 06/15] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked

2014-08-22 Thread Fabian Aggeler
ICDDCR/GICD_CTLR is banked in GICv1 implementations with Security Extensions or in GICv2 in independent from Security Extensions. This makes it possible to enable forwarding of interrupts from Distributor to the CPU interfaces for Group0 and Group1. EnableGroup0 (Bit [1]) in GICv1 is IMPDEF. Since