On Wed, 12 Sep 2012, Matthew Ogilvie wrote:
Also, how big of a concern is a very rare gained or lost IRQ0
actually? Under normal conditions, I would expect this to at most
cause a one time clock drift in the guest OS of a fraction of
a second. If that only happens when rebooting or
On 2012-09-13 15:41, Maciej W. Rozycki wrote:
On Wed, 12 Sep 2012, Matthew Ogilvie wrote:
Also, how big of a concern is a very rare gained or lost IRQ0
actually? Under normal conditions, I would expect this to at most
cause a one time clock drift in the guest OS of a fraction of
a second.
On 2012-09-13 07:49, Matthew Ogilvie wrote:
On Wed, Sep 12, 2012 at 10:57:57AM +0200, Jan Kiszka wrote:
On 2012-09-12 10:51, Avi Kivity wrote:
On 09/12/2012 11:48 AM, Jan Kiszka wrote:
On 2012-09-12 10:01, Avi Kivity wrote:
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of
On Thu, 13 Sep 2012, Jan Kiszka wrote:
I've also just skimmed parts of the 8254 section of The Indispensable PC
Hardware Book, by Hans-Peter Messmer, Copyright 1994 Addison-Wesley,
although I probably ought to read it more carefully.
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of edge triggered means: asserted with a
low-to-high transition at the time an interrupt is registered
and then kept high until the interrupt is served via one of the
EOI mechanisms or goes away unhandled.
So the only
On 2012-09-12 10:01, Avi Kivity wrote:
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of edge triggered means: asserted with a
low-to-high transition at the time an interrupt is registered
and then kept high until the interrupt is served via one of the
EOI mechanisms or
On 09/12/2012 11:48 AM, Jan Kiszka wrote:
On 2012-09-12 10:01, Avi Kivity wrote:
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of edge triggered means: asserted with a
low-to-high transition at the time an interrupt is registered
and then kept high until the interrupt is
On 2012-09-12 10:51, Avi Kivity wrote:
On 09/12/2012 11:48 AM, Jan Kiszka wrote:
On 2012-09-12 10:01, Avi Kivity wrote:
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of edge triggered means: asserted with a
low-to-high transition at the time an interrupt is registered
and
On 09/12/2012 11:57 AM, Jan Kiszka wrote:
On 2012-09-12 10:51, Avi Kivity wrote:
On 09/12/2012 11:48 AM, Jan Kiszka wrote:
On 2012-09-12 10:01, Avi Kivity wrote:
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of edge triggered means: asserted with a
low-to-high transition
On Wed, Sep 12, 2012 at 10:57:57AM +0200, Jan Kiszka wrote:
On 2012-09-12 10:51, Avi Kivity wrote:
On 09/12/2012 11:48 AM, Jan Kiszka wrote:
On 2012-09-12 10:01, Avi Kivity wrote:
On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
Intel's definition of edge triggered means: asserted with a
On 2012-09-11 02:49, Maciej W. Rozycki wrote:
On Sun, 9 Sep 2012, Matthew Ogilvie wrote:
This bug manifested itself when the guest was Microport UNIX
System V/386 v2.1 (ca. 1987), because it would sometimes mask
off IRQ14 in the slave IMR after it had already been asserted.
The master would
On Mon, 10 Sep 2012, Matthew Ogilvie wrote:
This bug manifested itself when the guest was Microport UNIX
System V/386 v2.1 (ca. 1987), because it would sometimes mask
off IRQ14 in the slave IMR after it had already been asserted.
The master would still try to deliver an interrupt even
On Sun, 9 Sep 2012, Matthew Ogilvie wrote:
This bug manifested itself when the guest was Microport UNIX
System V/386 v2.1 (ca. 1987), because it would sometimes mask
off IRQ14 in the slave IMR after it had already been asserted.
The master would still try to deliver an interrupt even though
On Tue, Sep 11, 2012 at 01:49:51AM +0100, Maciej W. Rozycki wrote:
On Sun, 9 Sep 2012, Matthew Ogilvie wrote:
This bug manifested itself when the guest was Microport UNIX
System V/386 v2.1 (ca. 1987), because it would sometimes mask
off IRQ14 in the slave IMR after it had already been
Intel's definition of edge triggered means: asserted with a
low-to-high transition at the time an interrupt is registered
and then kept high until the interrupt is served via one of the
EOI mechanisms or goes away unhandled.
So the only difference between edge triggered and level triggered
is in
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