Re: [Qemu-devel] [PATCH 10/13] ICH9 LPC: handle PIC and I/O APIC IRQs as qdev GPIO

2016-06-17 Thread Paolo Bonzini
On 17/06/2016 15:11, Efimov Vasily wrote: > The ICH9 LPC bridge has 24 output IRQs connected to I/O APIC and 16 output > IRQs > connected through GSI to both PIC and I/O APIC. Currently the IRQs are > referenced by pointers. The pointers are initialized at startup by direct > access to the struc

[Qemu-devel] [PATCH 10/13] ICH9 LPC: handle PIC and I/O APIC IRQs as qdev GPIO

2016-06-17 Thread Efimov Vasily
The ICH9 LPC bridge has 24 output IRQs connected to I/O APIC and 16 output IRQs connected through GSI to both PIC and I/O APIC. Currently the IRQs are referenced by pointers. The pointers are initialized at startup by direct access to the structure fields. This violates Qemu device model. The patc