On Fri, 2012-09-14 at 09:37 +0200, Gerd Hoffmann wrote:
> On 09/13/12 22:12, Jason Baron wrote:
> > +if (ram_size >= 0xe000) {
> > +above_4g_mem_size = ram_size - 0xe000;
> > +below_4g_mem_size = 0xe000;
>
> We should make the hole larger to get more pci i/o address
On Sun, Sep 16, 2012 at 09:48:25AM -0500, Anthony Liguori wrote:
> > I wonder if it's possible for q35 to have no devices
> > at all in the default machine and have it
> > fully qualified by -device switches?
> >
> > I envision -M qemu-1.3 switch that does exactly that,
> > so that machine type onl
"Michael S. Tsirkin" writes:
> On Thu, Sep 13, 2012 at 04:12:42PM -0400, Jason Baron wrote:
>> diff --git a/hw/pc_q35.c b/hw/pc_q35.c
>> new file mode 100644
>> index 000..4f75d97
>> --- /dev/null
>> +++ b/hw/pc_q35.c
>> @@ -0,0 +1,378 @@
>> +/*
>> + * QEMU PC System Emulator
>> + *
>> + * Co
On Thu, Sep 13, 2012 at 04:12:42PM -0400, Jason Baron wrote:
> diff --git a/hw/pc_q35.c b/hw/pc_q35.c
> new file mode 100644
> index 000..4f75d97
> --- /dev/null
> +++ b/hw/pc_q35.c
> @@ -0,0 +1,378 @@
> +/*
> + * QEMU PC System Emulator
> + *
> + * Copyright (c) 2003-2004 Fabrice Bellard
> + *
On Fri, Sep 14, 2012 at 03:26:30PM +0300, Michael S. Tsirkin wrote:
> I think it's best to smash the following patch into this one
> otherwise review becomes painful. Some short notes:
>
ok.
> > ---
> > hw/acpi_ich9.c| 315 ++
> > hw/acpi_ich9.h| 53 +++
> > h
On Fri, Sep 14, 2012 at 09:37:03AM +0200, Gerd Hoffmann wrote:
> On 09/13/12 22:12, Jason Baron wrote:
> > +if (ram_size >= 0xe000) {
> > +above_4g_mem_size = ram_size - 0xe000;
> > +below_4g_mem_size = 0xe000;
>
> We should make the hole larger to get more pci i/o
On Thu, Sep 13, 2012 at 04:12:42PM -0400, Jason Baron wrote:
> From: Isaku Yamahata
>
> pc q35 based chipset emulator to support pci express natively.
>
> Signed-off-by: Isaku Yamahata
> Signed-off-by: Jason Baron
I think it's best to smash the following patch into this one
otherwise review b
On 09/13/12 22:12, Jason Baron wrote:
> +if (ram_size >= 0xe000) {
> +above_4g_mem_size = ram_size - 0xe000;
> +below_4g_mem_size = 0xe000;
We should make the hole larger to get more pci i/o address space below
4G, especially as q35 needs a good chunk of it for mmco
Il 13/09/2012 22:12, Jason Baron ha scritto:
> +typedef struct ICH9_LPCIrqState {
> +struct ICH9_LPCState *lpc;
Please add DEFINE_PROP_PTR property for this field in gmch_pcihost_info,
so we know this ought to become a link later.
> +qemu_irq *pic;
> +qemu_irq *ioapic;
> +} ICH9_LPCIr
