Il 09/09/2014 17:44, Paolo Bonzini ha scritto:
> Il 04/09/2014 20:27, Tom Musta ha scritto:
-tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so);
+tcg_gen_trunc_tl_i32(cpu_cr[crf * 4 + CRF_SO], cpu_so);
>> This looks correct to me but is causing problems. The above statement seems
>> to
Il 09/09/2014 18:03, Richard Henderson ha scritto:
> Note that since most hosts don't have nand, the combination
>
> nand x,y,z
> and x.x,1
>
> would be better represented with
>
> and x,y,z
> xor x,x,1
True (and even for crorc a,b,c you can change it to crandc a,c,b
followed by xor)
On 09/04/2014 11:27 AM, Tom Musta wrote:
>> -tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so);
>> +tcg_gen_trunc_tl_i32(cpu_cr[crf * 4 + CRF_SO], cpu_so);
>
> This looks correct to me but is causing problems. The above statement seems
> to get dropped in the generated asm ... at least on a PPC
Il 04/09/2014 20:27, Tom Musta ha scritto:
>> > -tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so);
>> > +tcg_gen_trunc_tl_i32(cpu_cr[crf * 4 + CRF_SO], cpu_so);
> This looks correct to me but is causing problems. The above statement seems
> to get dropped in the generated asm ... at least on a
On 8/28/2014 12:15 PM, Paolo Bonzini wrote:
> This makes comparisons much smaller and faster. The speedup is
> approximately 10% on user-mode emulation on x86 host, 3-4% on PPC.
>
> Note that CRF_* constants are flipped to match PowerPC's big
> bit-endianness. Previously, the CR register was eff
This makes comparisons much smaller and faster. The speedup is
approximately 10% on user-mode emulation on x86 host, 3-4% on PPC.
Note that CRF_* constants are flipped to match PowerPC's big
bit-endianness. Previously, the CR register was effectively stored
in mixed endianness, so now there is l
