The PL022 interrupt registers have bits allocated as:
0: ROR (receive overrun)
1: RT (receive timeout)
2: RX (receive FIFO half full or less)
3: TX (transmit FIFO half full or less)
A cut and paste error meant we had the wrong value for
the PL022_INT_RT constant. This bug doesn't affect device
On 08/20/2018 07:11 AM, Peter Maydell wrote:
> The PL022 interrupt registers have bits allocated as:
> 0: ROR (receive overrun)
> 1: RT (receive timeout)
> 2: RX (receive FIFO half full or less)
> 3: TX (transmit FIFO half full or less)
>
> A cut and paste error meant we had the wrong value fo
