On 4 January 2011 15:58, Aurelien Jarno wrote:
> On Mon, Jan 03, 2011 at 04:48:54PM +, Peter Maydell wrote:
>> - i = vfp_exceptbits_to_host((val >> 8) & 0x1f);
>> + i = vfp_exceptbits_to_host(val);
>
> This change looks correct (using the flag instead of the enable bit),
> but it might b
On Mon, Jan 03, 2011 at 04:48:54PM +, Peter Maydell wrote:
> Wire up the new softfloat support for flushing input denormals
> to zero on ARM. The FPSCR FZ bit enables flush-to-zero for
> both inputs and outputs, but the reporting of when inputs are
> flushed to zero is via a separate IDC bit ra
Wire up the new softfloat support for flushing input denormals
to zero on ARM. The FPSCR FZ bit enables flush-to-zero for
both inputs and outputs, but the reporting of when inputs are
flushed to zero is via a separate IDC bit rather than the UFC
(underflow) bit used when output denormals are flushe
