This is done by unfolding the sysbus_create_varargs() call and by
announcing that only a single irq is needed before connecting the irqs
before the bus is initialized.
This should model the design of the SAM board better, which is that all
PCI interrupts are connected to a single interrupt pin, in particular that
the logical level of the destination pin is an combined or of all the
individual interrupt levels.
Signed-off-by: Sebastian Bauer <m...@sebastianbauer.info>
---
hw/ppc/sam460ex.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index b2b22f280d..28265bcb4c 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -515,10 +515,16 @@ static void sam460ex_init(MachineState *machine)
/* PCI bus */
ppc460ex_pcie_init(env);
- /* All PCI ints are connected to the same UIC pin (cf. UBoot source) */
- dev = sysbus_create_varargs("ppc440-pcix-host", 0xc0ec00000,
- uic[1][0], uic[1][0], uic[1][0], uic[1][0],
- NULL);
+
+ /* All PCI ints of the PCI-X bus are connected to the same UIC pin (cf.
+ * UBoot source) so only one connection is needed. */
+ dev = qdev_create(NULL, "ppc440-pcix-host");
+ qdev_prop_set_uint16(dev, "num-irqs", 1);
+ sbdev = SYS_BUS_DEVICE(dev);
+ qdev_init_nofail(dev);
+ sysbus_mmio_map(sbdev, 0, 0xc0ec00000);
+ sysbus_connect_irq(sbdev, 0, uic[1][0]);
+
pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci.0");
if (!pci_bus) {
error_report("couldn't create PCI controller!");
--
2.18.0
