On 02/20/2015 09:57 AM, Paolo Bonzini wrote:
> + * TCG will have to generate an operand as large as the distance between
> + * tlb_table[0][0] and the tlb_table[NB_MMU_MODES - 1][0].addend. For
Nit: the distance is from the start of env, i.e.
offsetof(CPUArchState, tlb_table[mem_index][0].adde
At 8k per TLB (for 64-bit host or target), 8 or more modes
make the TLBs bigger than 64k, and some RISC TCG backends do
not like that. On the affected hosts, cut the TLB size in
half---there is still a measurable speedup on PPC with the
next patch.
Signed-off-by: Paolo Bonzini
---
include/exec/
At 8k per TLB (for 64-bit host or target), 8 or more modes
make the TLBs bigger than 64k, and some RISC TCG backends do
not like that. On the affected hosts, cut the TLB size in
half---there is still a measurable speedup on PPC with the
next patch.
Signed-off-by: Paolo Bonzini
---
include/exec/
