[Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not tre

On Thu, Dec 29, 2011 at 4:17 PM, Andreas Färber wrote: > Am 29.12.2011 08:55, schrieb Khansa Butt: >> On Fri, Dec 9, 2011 at 5:04 AM, Andreas Färber >> wrote: +    /* if cpu has FPU, MIPS_HFLAG_F64 must be included in env->hflags +       so that floating point operations can be emulate

[Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not tre

From: Khansa Butt Signed-off-by: Abdul Qadeer --- target-mips/translate.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index d5b1c76..452a63b 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -

[Qemu-devel] [PATCH 2/3] target-mips:enabling of 64 bit user mode and floating point operations MIPS_HFLAG_UX is included in env->hflags so that the address computation for LD instruction does not tre

From: Khansa Butt Signed-off-by: Khansa Butt --- target-mips/translate.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index d5b1c76..452a63b 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -1