On 11/27/2013 12:56 AM, Claudio Fontana wrote:
> On 09/27/2013 09:42 PM, Richard Henderson wrote:
>> On 09/26/2013 05:48 PM, Alexander Graf wrote:
>>> +if (setflags) {
>>> +tcg_dst = cpu_reg(dest);
>>> +} else {
>>> +tcg_dst = cpu_reg_sp(dest);
>>> +}
>>
>> Never sp for
On Tue, Nov 26, 2013 at 12:56 PM, Claudio Fontana
wrote:
> On 09/27/2013 09:42 PM, Richard Henderson wrote:
>> On 09/26/2013 05:48 PM, Alexander Graf wrote:
>>> +if (setflags) {
>>> +tcg_dst = cpu_reg(dest);
>>> +} else {
>>> +tcg_dst = cpu_reg_sp(dest);
>>> +}
>>
>> Ne
On 09/27/2013 09:42 PM, Richard Henderson wrote:
> On 09/26/2013 05:48 PM, Alexander Graf wrote:
>> +if (setflags) {
>> +tcg_dst = cpu_reg(dest);
>> +} else {
>> +tcg_dst = cpu_reg_sp(dest);
>> +}
>
> Never sp for logicals.
This should be ok in my view, the manual expl
On 09/26/2013 05:48 PM, Alexander Graf wrote:
> +if (setflags) {
> +tcg_dst = cpu_reg(dest);
> +} else {
> +tcg_dst = cpu_reg_sp(dest);
> +}
Never sp for logicals.
> +handle_orri(s, insn);
And yet again, a better function name.
r~
This patch adds emulation support for the orr immediate instruction
family with all its implementations (and, or, xor).
Signed-off-by: Alexander Graf
---
target-arm/translate-a64.c | 96 +-
1 file changed, 95 insertions(+), 1 deletion(-)
diff --git a/
