>> >There are two main things we can do:
>> >1. Make the 64 bit device only use the low 32 bit
>> It was my first implementation. Unfortunately older versions of
>> Linux (Like 2.6.18) hang during startup with this.
>> As far as I remember it was qemu-0.15 so may be 1.0 have no such an
>> issue.
On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
> On 29/12/11 00:43, Michael S. Tsirkin wrote:
> >On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> >>All devices behind a bridge need to have all their regions consecutive and
> >>not overlapping with all the normal me
On Fri, Dec 30, 2011 at 06:10:13PM +1300, Alexey Korolev wrote:
> On 30/12/11 05:21, Michael S. Tsirkin wrote:
> >On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
> >>>Can't figure this out. What does this do?
> >>Bios will panic if it founds prefmem BARs in both 32bit and 64bit area
On 30/12/11 05:21, Michael S. Tsirkin wrote:
On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
Can't figure this out. What does this do?
Bios will panic if it founds prefmem BARs in both 32bit and 64bit areas.
That's not good, it's a legal configuration.
To be more complete : Bi
On 30/12/11 05:21, Michael S. Tsirkin wrote:
On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
Can't figure this out. What does this do?
Bios will panic if it founds prefmem BARs in both 32bit and 64bit areas.
That's not good, it's a legal configuration.
To be more complete : Bi
On Wed, Dec 28, 2011 at 01:43:02PM +0200, Michael S. Tsirkin wrote:
> On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> > All devices behind a bridge need to have all their regions consecutive and
> > not overlapping with all the normal memory ranges.
> > Since prefetchable memory i
On 30/12/11 05:18, Michael S. Tsirkin wrote:
On Thu, Dec 29, 2011 at 06:40:26PM +1300, Alexey Korolev wrote:
On 29/12/11 00:43, Michael S. Tsirkin wrote:
On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
All devices behind a bridge need to have all their regions consecutive and
n
On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
> >Can't figure this out. What does this do?
> Bios will panic if it founds prefmem BARs in both 32bit and 64bit areas.
That's not good, it's a legal configuration.
> Otherwise we will pick one which exists or 32bit one if both are n
On Thu, Dec 29, 2011 at 06:41:36PM +1300, Alexey Korolev wrote:
> On 29/12/11 00:43, Michael S. Tsirkin wrote:
> >On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> >>All devices behind a bridge need to have all their regions consecutive and
> >>not overlapping with all the normal me
On Thu, Dec 29, 2011 at 06:40:26PM +1300, Alexey Korolev wrote:
> On 29/12/11 00:43, Michael S. Tsirkin wrote:
> >On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> >>All devices behind a bridge need to have all their regions consecutive and
> >>not overlapping with all the normal me
On 29/12/11 00:43, Michael S. Tsirkin wrote:
On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
All devices behind a bridge need to have all their regions consecutive and
not overlapping with all the normal memory ranges.
Since prefetchable memory is described by one record, we must
On 29/12/11 00:43, Michael S. Tsirkin wrote:
On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
All devices behind a bridge need to have all their regions consecutive and
not overlapping with all the normal memory ranges.
Since prefetchable memory is described by one record, we must
On Wed, Dec 28, 2011 at 06:35:55PM +1300, Alexey Korolev wrote:
> All devices behind a bridge need to have all their regions consecutive and
> not overlapping with all the normal memory ranges.
> Since prefetchable memory is described by one record, we must avoid the
> situations
> when 32bit and
All devices behind a bridge need to have all their regions consecutive and
not overlapping with all the normal memory ranges.
Since prefetchable memory is described by one record, we must avoid the
situations
when 32bit and 64bit prefetchable regions are present within one secondary bus.
Signed-
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