On 17/07/2015 11:50, Ефимов Василий wrote:
> I will try solution based on address spaces as stated above.
If it works, that would be great.
Paolo
16.07.2015 20:52, Paolo Bonzini пишет:
On 16/07/2015 16:41, Ефимов Василий wrote:
The main problem is rendering memory tree to FlatView.
I don't believe it's necessary to render a memory tree to the FlatView.
You can use existing AddressSpaces.
+/* Read from RAM and write to PCI */
+
On 16/07/2015 16:41, Ефимов Василий wrote:
> The main problem is rendering memory tree to FlatView.
I don't believe it's necessary to render a memory tree to the FlatView.
You can use existing AddressSpaces.
>> +/* Read from RAM and write to PCI */
>> +memory_region_init_io(&pam->regio
16.07.2015 14:10, Paolo Bonzini wrote:
>
>
> On 16/07/2015 12:51, Ефимов Василий wrote:
>> The rest of code looks up destination or source region or child region
>> offset in memory sub-tree which root is PCI or RAM region provided on
>> PAM creation. We cannon use common address_space_translate b
On 16/07/2015 12:51, Ефимов Василий wrote:
> The rest of code looks up destination or source region or child region
> offset in memory sub-tree which root is PCI or RAM region provided on
> PAM creation. We cannon use common address_space_translate because it
> searches from address space root an
16.07.2015 12:05, Paolo Bonzini пишет:
On 16/07/2015 10:35, Efimov Vasily wrote:
This patch improves PAM emulation.
PAM defines 4 memory access redirection modes. In mode 1 reads are directed to
RAM and writes are directed to PCI. In mode 2 it is contrary. In mode 0 all
access is directed to
On 16/07/2015 10:35, Efimov Vasily wrote:
> This patch improves PAM emulation.
>
> PAM defines 4 memory access redirection modes. In mode 1 reads are directed to
> RAM and writes are directed to PCI. In mode 2 it is contrary. In mode 0 all
> access is directed to PCI. In mode 3 it is directed to
This patch improves PAM emulation.
PAM defines 4 memory access redirection modes. In mode 1 reads are directed to
RAM and writes are directed to PCI. In mode 2 it is contrary. In mode 0 all
access is directed to PCI. In mode 3 it is directed to RAM. Modes 0 and 3 are
well emulated but modes 1 and
