On 3/3/10 4:17 PM, Richard Henderson wrote:
+ float64 sc_fpregs[2]; /* room for two fp registers */
...
- int f_fpcntl[3];
- int f_fpregs[8*3];
+ uint32_t f_fpcntl[3];
+ float64 f_fpregs[8];
Surely these float64 uses are incorrect. The kernel uses 3*int
at both of these places, which match
+float64sc_fpregs[2]; /* room for two fp registers */
...
-int f_fpcntl[3];
-int f_fpregs[8*3];
+uint32_t f_fpcntl[3];
+float64f_fpregs[8];
Surely these float64 uses are incorrect. The kernel uses 3*int
at both of these places, which matches up with the 96-bit
>From 1450a09c513a3051e3cf44d948983fe48ef368e0 Mon Sep 17 00:00:00 2001
From: Maxim Kuvyrkov
Date: Mon, 1 Mar 2010 02:48:31 -0800
Subject: [PATCH 3/4] Fix signal handling for ColdFire
Handle FPU registers.
Pack structures that contain 16-bit fields. This avoid problems due to
differences betwe
