On Tue, 29 Apr 2014 11:14:12 +0200
Alexander Graf wrote:
>
> On 28.04.14 14:47, Andreas Färber wrote:
> > [fixing Bharata's address]
> >
> > Am 28.04.2014 13:29, schrieb Greg Kurz:
> >> POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
> >> special purpose register to decide the end
On 28.04.14 14:47, Andreas Färber wrote:
[fixing Bharata's address]
Am 28.04.2014 13:29, schrieb Greg Kurz:
POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
special purpose register to decide the endianness to use when
entering interrupt handlers. When running a linux guest, thi
[fixing Bharata's address]
Am 28.04.2014 13:29, schrieb Greg Kurz:
> POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
> special purpose register to decide the endianness to use when
> entering interrupt handlers. When running a linux guest, this
> provides a hint on the endianness u
POWER7, POWER7+ and POWER8 families use the ILE bit of the LPCR
special purpose register to decide the endianness to use when
entering interrupt handlers. When running a linux guest, this
provides a hint on the endianness used by the kernel. From a
qemu point of view, the information is needed for