Re: [Qemu-devel] [PATCH 3/4] target-tricore: Added new MOV instruction variant

2016-06-04 Thread Richard Henderson
On 05/29/2016 03:59 PM, peer.ad...@c-lab.de wrote: +tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); +tcg_gen_mov_tl(cpu_gpr_d[(r3 + 1)], cpu_gpr_d[r2]); Don't add pointless parenthesis. But more importantly, you need to worry about overlap between r3 and r2. In the general case y

Re: [Qemu-devel] [PATCH 3/4] target-tricore: Added new MOV instruction variant

2016-05-30 Thread Bastian Koppelmann
On 05/30/2016 12:59 AM, peer.ad...@c-lab.de wrote: > From: Peer Adelt > > Puts the content of data register D[a] into E[c][63:32] and the > content of data register D[b] into E[c][31:0]. > > Signed-off-by: Peer Adelt > --- > target-tricore/translate.c | 4 > target-tricore/tricore-o

[Qemu-devel] [PATCH 3/4] target-tricore: Added new MOV instruction variant

2016-05-29 Thread peer . adelt
From: Peer Adelt Puts the content of data register D[a] into E[c][63:32] and the content of data register D[b] into E[c][31:0]. Signed-off-by: Peer Adelt --- target-tricore/translate.c | 4 target-tricore/tricore-opcodes.h | 1 + 2 files changed, 5 insertions(+) diff --git a/target