On Fri, Dec 09, 2016 at 04:30:20PM +, Peter Maydell wrote:
> The architectural timers in ARM CPUs all have level triggered interrupts
> (unless you're using KVM on a host kernel before 4.4, which misimplemented
> them as edge-triggered).
>
> We were incorrectly describing them in the device tr
On Sun, Dec 11, 2016 at 10:52:25PM +, Peter Maydell wrote:
> On 11 December 2016 at 16:35, Christoffer Dall
> wrote:
> > On Fri, Dec 09, 2016 at 04:30:20PM +, Peter Maydell wrote:
> >> + * For backwards-compatibility, virt-2.8 and earlier will continue
> >> + * to say these are edg
On 11 December 2016 at 16:35, Christoffer Dall
wrote:
> On Fri, Dec 09, 2016 at 04:30:20PM +, Peter Maydell wrote:
>> + * For backwards-compatibility, virt-2.8 and earlier will continue
>> + * to say these are edge-triggered, but later machines will report
>> + * the correct inform
On Fri, Dec 09, 2016 at 04:30:20PM +, Peter Maydell wrote:
> The architectural timers in ARM CPUs all have level triggered interrupts
> (unless you're using KVM on a host kernel before 4.4, which misimplemented
> them as edge-triggered).
>
> We were incorrectly describing them in the device tr
The architectural timers in ARM CPUs all have level triggered interrupts
(unless you're using KVM on a host kernel before 4.4, which misimplemented
them as edge-triggered).
We were incorrectly describing them in the device tree as edge triggered.
This can cause problems for guest kernels in 4.8 be
