On 08/24/2018 12:44 PM, Craig Janeczek via Qemu-devel wrote:
> +gen_load_mxu_gpr(t1, opcode->D16MUL.xrb);
> +tcg_gen_ext16s_tl(t0, t1);
> +tcg_gen_shri_tl(t1, t1, 16);
> +tcg_gen_ext16s_tl(t1, t1);
tcg_gen_sextract_tl(t0, t1, 0, 16);
tcg_gen_sextract_tl(t1, t1,
Adds support for emulating the D16MUL instruction.
Signed-off-by: Craig Janeczek
---
target/mips/translate.c | 55 -
1 file changed, 54 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4d5849..64fc6089b
