On 04/24/2018 03:31 PM, Philippe Mathieu-Daudé wrote:
>> @@ -5431,10 +5446,15 @@ static void disas_fp_int_conv(DisasContext *s,
>> uint32_t insn)
>> case 0xa: /* 64 bit */
>> case 0xd: /* 64 bit to top half of quad */
>> break;
>> +case 0x6: /* 16-bit */
>>
Hi Richard,
On 04/24/2018 10:22 PM, Richard Henderson wrote:
> Adding the fp16 moves to/from general registers.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 22 +-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
Adding the fp16 moves to/from general registers.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index