On Wed, Feb 03, 2016 at 01:38:40PM +, Peter Maydell wrote:
> Implement some corner cases of the behaviour of the NSACR
> register on ARMv8:
> * if EL3 is AArch64 then accessing the NSACR from Secure EL1
>with AArch32 should trap to EL3
> * if EL3 is not present or is AArch64 then reads fr
Implement some corner cases of the behaviour of the NSACR
register on ARMv8:
* if EL3 is AArch64 then accessing the NSACR from Secure EL1
with AArch32 should trap to EL3
* if EL3 is not present or is AArch64 then reads from NS EL1 and
NS EL2 return constant 0xc00
It would in theory be poss
