Re: [Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level

2017-10-11 Thread Peter Maydell
On 11 October 2017 at 03:18, Richard Henderson wrote: > On 10/09/2017 06:48 AM, Peter Maydell wrote: >> +if ((insn >> 11) == 0x1e && (s->pc < s->next_page_start - 3)) { >> +/* 0b_0xxx__ : BL/BLX prefix, and the suffix >> + * is not on the next page; we merge this in

Re: [Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level

2017-10-10 Thread Richard Henderson
On 10/09/2017 06:48 AM, Peter Maydell wrote: > +if ((insn >> 11) == 0x1e && (s->pc < s->next_page_start - 3)) { > +/* 0b_0xxx__ : BL/BLX prefix, and the suffix > + * is not on the next page; we merge this into a 32-bit > + * insn. > + */ > +re

[Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level

2017-10-09 Thread Peter Maydell
Refactor the Thumb decode to do the loads of the instruction words at the top level rather than only loading the second half of a 32-bit Thumb insn in the middle of the decode. This is simple apart from the awkward case of Thumb1, where the BL/BLX prefix and suffix instructions live in what in Thu