On Tue, 9 Dec 2014, Maciej W. Rozycki wrote:
> Index: qemu-git-trunk/target-mips/op_helper.c
> ===
> --- qemu-git-trunk.orig/target-mips/op_helper.c 2014-12-08
> 23:22:12.0 +
> +++ qemu-git-trunk/target-mips/op_help
On 10/02/2015 14:30, Maciej W. Rozycki wrote:
> On Tue, 10 Feb 2015, Leon Alrae wrote:
>
>>> These cases could be addressed by either replacing subtraction from 0.0
>>> with multiplication by -1.0, or by tweaking the rounding mode as needed
>>> temporarily. Given that the computational cost of
On Tue, 10 Feb 2015, Leon Alrae wrote:
> > These cases could be addressed by either replacing subtraction from 0.0
> > with multiplication by -1.0, or by tweaking the rounding mode as needed
> > temporarily. Given that the computational cost of multiplication is
> > uncertain and likely highe
On 09/02/2015 20:55, Maciej W. Rozycki wrote:
>>> +uint32_t helper_float_chs_s(CPUMIPSState *env, uint32_t fst0)
>>> +{
>>> +uint32_t fst1;
>>> +
>>> +fst1 = float32_sub(0, fst0, &env->active_fpu.fp_status);
>>> +update_fcr31(env, GETPC());
>>> +return fst1;
>>> +}
>>
>> I think the
On Mon, 9 Feb 2015, Leon Alrae wrote:
> > +if (info->elf_flags & EF_MIPS_NAN2008)
> > +env->active_fpu.fcr31 |=
> > +(1 << FCR31_NAN2008) & env->active_fpu.fcr31_rw_bitmask;
> > +else
> > +env->active_fpu.fcr31 &=
> > +~((1 <<
On 09/12/2014 01:56, Maciej W. Rozycki wrote:
> +if (info->elf_flags & EF_MIPS_NAN2008)
> +env->active_fpu.fcr31 |=
> +(1 << FCR31_NAN2008) & env->active_fpu.fcr31_rw_bitmask;
> +else
> +env->active_fpu.fcr31 &=
> +~((1 << FCR3
Add support for the IEEE 754-2008 features introduced to revision 3.50
[1][2] of the MIPS Architecture as follows.
1. IEEE 754-2008 NaN encoding.
Implement the CP1.FCSR.NAN2008 bit with the expected intepretation.
Update code to handle CP1.FCSR.NAN2008 correctly in CTC1 and the GDB
s
