Re: [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional

2017-10-11 Thread Richard Henderson
On 10/11/2017 02:57 AM, Peter Maydell wrote: > On 11 October 2017 at 03:52, Richard Henderson > wrote: >> On 10/09/2017 06:48 AM, Peter Maydell wrote: >>> -if (dc->condexec_mask) { >>> +if (dc->condexec_mask && !thumb_insn_is_unconditional(dc, insn)) { >>>

Re: [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional

2017-10-11 Thread Peter Maydell
On 11 October 2017 at 03:52, Richard Henderson wrote: > On 10/09/2017 06:48 AM, Peter Maydell wrote: >> -if (dc->condexec_mask) { >> +if (dc->condexec_mask && !thumb_insn_is_unconditional(dc, insn)) { >> uint32_t cond = dc->condexec_cond; >> >>

Re: [Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional

2017-10-10 Thread Richard Henderson
On 10/09/2017 06:48 AM, Peter Maydell wrote: > -if (dc->condexec_mask) { > +if (dc->condexec_mask && !thumb_insn_is_unconditional(dc, insn)) { > uint32_t cond = dc->condexec_cond; > > if (cond != 0x0e) { /* Skip conditional when condition is AL. */ Don't you still

[Qemu-devel] [PATCH 8/9] target/arm: Support some Thumb insns being always unconditional

2017-10-09 Thread Peter Maydell
A few Thumb instructions are always unconditional even inside an IT block (as opposed to being UNPREDICTABLE if used inside an IT block): BKPT, the v8M SG instruction, and the A profile HLT (debug halt) instruction. This means we need to suppress the jump-over-instruction-on-condfail code