Re: [Qemu-devel] [PATCH 9/9] target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction

Hi Peter, On 08/27/2015 02:35 PM, Peter Maydell wrote: > On 13 August 2015 at 17:35, Peter Maydell wrote: >> For the A64 instruction set, the semihosting call instruction >> is 'HLT 0xf000'. Wire this up to call do_arm_semihosting() >> if semihosting is enabled. >> >>

Re: [Qemu-devel] [PATCH 9/9] target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction

On 13 August 2015 at 17:35, Peter Maydell peter.mayd...@linaro.org wrote: For the A64 instruction set, the semihosting call instruction is 'HLT 0xf000'. Wire this up to call do_arm_semihosting() if semihosting is enabled. Signed-off-by: Peter Maydell peter.mayd...@linaro.org --- @@ -1553,8

Re: [Qemu-devel] [PATCH 9/9] target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction

On Aug 13, 2015 9:35 AM, Peter Maydell peter.mayd...@linaro.org wrote: For the A64 instruction set, the semihosting call instruction is 'HLT 0xf000'. Wire this up to call do_arm_semihosting() if semihosting is enabled. Signed-off-by: Peter Maydell peter.mayd...@linaro.org Reviewed-by:

[Qemu-devel] [PATCH 9/9] target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction

For the A64 instruction set, the semihosting call instruction is 'HLT 0xf000'. Wire this up to call do_arm_semihosting() if semihosting is enabled. Signed-off-by: Peter Maydell peter.mayd...@linaro.org --- linux-user/main.c | 3 +++ target-arm/cpu.h | 1 +