Re: [Qemu-devel] [PATCH RFC v1 3/3] target/ppc: Generate fence operations

2017-04-07 Thread Richard Henderson
On 04/06/2017 10:21 PM, Nikunj A Dadhania wrote: We do that in the macro: if (len > 1) { \ gen_check_align(ctx, t0, (len) - 1);\ } \ Would we still need a

Re: [Qemu-devel] [PATCH RFC v1 3/3] target/ppc: Generate fence operations

2017-04-06 Thread Nikunj A Dadhania
Richard Henderson writes: > On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote: >> @@ -3028,6 +3030,7 @@ static void gen_##name(DisasContext *ctx) >> \ >> tcg_gen_qemu_ld_tl(gpr, t0, ctx->mem_idx, memop);\ >>

Re: [Qemu-devel] [PATCH RFC v1 3/3] target/ppc: Generate fence operations

2017-04-06 Thread Richard Henderson
On 04/06/2017 03:22 AM, Nikunj A Dadhania wrote: @@ -3028,6 +3030,7 @@ static void gen_##name(DisasContext *ctx) \ tcg_gen_qemu_ld_tl(gpr, t0, ctx->mem_idx, memop);\ tcg_gen_mov_tl(cpu_reserve, t0); \

[Qemu-devel] [PATCH RFC v1 3/3] target/ppc: Generate fence operations

2017-04-06 Thread Nikunj A Dadhania
Signed-off-by: Nikunj A Dadhania --- target/ppc/translate.c | 5 + 1 file changed, 5 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index a9c733d..87b4fe4 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -2971,6