c: Will Auld; qemu-devel; Gleb; Marcelo Tosatti; k...@vger.kernel.org;
> Dugger, Donald D; Liu, Jinsong; Zhang, Xiantao; a...@redhat.com
> Subject: Re: [Qemu-devel] [PATCH V2] Resend - Enabling IA32_TSC_ADJUST
> for Qemu KVM guest VMs
>
> Hello,
>
> Am 26.11.2012 19:42, sc
Hello,
Am 26.11.2012 19:42, schrieb Will Auld:
> CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
>
> Basic design is to emulate the MSR by allowing reads and writes to the
> hypervisor vcpu specific locations to store the value of the emulated MSRs.
> In this way the IA32_TSC_A
CPUID.7.0.EBX[1]=1 indicates IA32_TSC_ADJUST MSR 0x3b is supported
Basic design is to emulate the MSR by allowing reads and writes to the
hypervisor vcpu specific locations to store the value of the emulated MSRs.
In this way the IA32_TSC_ADJUST value will be included in all reads to
the TSC MSR w
