On Fri, Jan 25, 2013 at 06:00:36PM +, Paul Brook wrote:
> > To be able to create generic GPIO devices or other devices that have GPIO
> > like pins (e.g MDIO), and hook those up to external buses through common
> > frameworks, we need agreement on how to model tristate pins.
> > A tristate pin
Am 25.01.2013 19:00, schrieb Paul Brook:
>> 1. It's not point-to-point, has an arbitrary nr of connection points.
>
> QoM currently only does asymmetric 1-1 connections between objects. However
> I
> don't think this is a fatal problem. We can still retain an asymmetric API
> (effectively equ
> To be able to create generic GPIO devices or other devices that have GPIO
> like pins (e.g MDIO), and hook those up to external buses through common
> frameworks, we need agreement on how to model tristate pins.
> A tristate pin model, or at least agreement on how to model these with
> multiple q
On Thu, Jan 24, 2013 at 02:21:09PM +, Paul Brook wrote:
> > > > It also worries me that there isn't a clean separation between the MDIO
> > > > bus and the bitbang interface. IMO the bitbang interface should be a
> > > > separate device, and if we're wiring up bitbang interfaces then it
> > >
> > > It also worries me that there isn't a clean separation between the MDIO
> > > bus and the bitbang interface. IMO the bitbang interface should be a
> > > separate device, and if we're wiring up bitbang interfaces then it
> > > really should be via standard GPIO pins (aka qemu_irq).
> >
> > O
Sorry for reposting,
My email client freaked out when posting the first reply...
- Forwarded message from "Edgar E. Iglesias"
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On Wed, 23 Jan 2013 23:45:13 +, Paul Brook wrote:
> > +#ifdef USE_THIS_DEAD_CODE
> > +void mdio_detach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int
> > addr) +{
> > +bus->devs[addr & 0x1f] = NULL;
> > +}
> > +#endif
>
> This is clearly wrong.
It's in both versions of the ori
> +#ifdef USE_THIS_DEAD_CODE
> +void mdio_detach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int
> addr) +{
> +bus->devs[addr & 0x1f] = NULL;
> +}
> +#endif
This is clearly wrong.
It also worries me that there isn't a clean separation between the MDIO bus
and the bitbang interface
The etraxfs and Xilinx axienet Ethernet models implement quite a nice
MDIO core that supports both bitbanging and direct register access. This
change factors the common code out into a separate file. There are no
functional changes here, just movement of code.
The etraxfs and axienet are slightly
