Re: [Qemu-devel] [PATCH v1 01/28] target/riscv: Add the Hypervisor extension

2019-09-10 Thread Palmer Dabbelt
On Fri, 23 Aug 2019 16:37:52 PDT (-0700), Alistair Francis wrote: Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 124ed33ee4..7f54fb8c87 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cp

Re: [Qemu-devel] [PATCH v1 01/28] target/riscv: Add the Hypervisor extension

2019-08-27 Thread Chih-Min Chao
On Sat, Aug 24, 2019 at 7:42 AM Alistair Francis wrote: > Signed-off-by: Alistair Francis > --- > target/riscv/cpu.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h > index 124ed33ee4..7f54fb8c87 100644 > --- a/target/riscv/cpu.h > +++ b/target/r

[Qemu-devel] [PATCH v1 01/28] target/riscv: Add the Hypervisor extension

2019-08-23 Thread Alistair Francis
Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 124ed33ee4..7f54fb8c87 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -67,6 +67,7 @@ #define RVC RV('C') #define RVS RV('S') #de