Re: [Qemu-devel] [PATCH v1 07/28] target/riscv: Dump Hypervisor registers if enabled

2019-09-10 Thread Palmer Dabbelt
On Fri, 23 Aug 2019 16:38:07 PDT (-0700), Alistair Francis wrote: Dump the Hypervisor registers and the current Hypervisor state. While we are editing this code let's also dump stvec and scause. Signed-off-by: Alistair Francis Signed-off-by: Atish Patra --- target/riscv/cpu.c | 34 ++

[Qemu-devel] [PATCH v1 07/28] target/riscv: Dump Hypervisor registers if enabled

2019-08-23 Thread Alistair Francis
Dump the Hypervisor registers and the current Hypervisor state. While we are editing this code let's also dump stvec and scause. Signed-off-by: Alistair Francis Signed-off-by: Atish Patra --- target/riscv/cpu.c | 34 ++ 1 file changed, 34 insertions(+) diff --g