On Tue, Nov 06, 2012 at 03:50:08AM +, Jovanovic, Petar wrote:
> Since the change has been committed as-is, who will be sending fixes for
> OPC_REPL_PH and other cases?
> Jia, will you do that?
>
I am working on a patch series fixing and cleaning DSP support, it will
include this fix. I hope
; Peter Maydell; Jovanovic, Petar; qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v12 09/14] target-mips: Add ASE DSP
bit/manipulation instructions
Hi Aurelien,
On Thu, Nov 1, 2012 at 3:20 AM, Aurelien Jarno wrote:
> On Wed, Oct 31, 2012 at 09:29:30PM +0800, Jia Liu wrote:
>>
&
Hi Aurelien,
On Thu, Nov 1, 2012 at 3:20 AM, Aurelien Jarno wrote:
> On Wed, Oct 31, 2012 at 09:29:30PM +0800, Jia Liu wrote:
>>
>> Is this time OK?
>
> As said by Peter, I don't think the code should be modified, the
> previous code was fine.
>
You mean my v12 09/14 is OK? It is a good news to
On Wed, Oct 31, 2012 at 09:29:30PM +0800, Jia Liu wrote:
> Hi Richard Peter Jovanovic and Aurelien,
>
> On Wed, Oct 31, 2012 at 1:26 PM, Richard Henderson wrote:
> > On 2012-10-31 01:44, Peter Maydell wrote:
> >> On 30 October 2012 15:34, Jia Liu wrote:
> >>> On Mon, Oct 29, 2012 at 9:40 PM, Jov
Hi Richard Peter Jovanovic and Aurelien,
On Wed, Oct 31, 2012 at 1:26 PM, Richard Henderson wrote:
> On 2012-10-31 01:44, Peter Maydell wrote:
>> On 30 October 2012 15:34, Jia Liu wrote:
>>> On Mon, Oct 29, 2012 at 9:40 PM, Jovanovic, Petar wrote:
> imm = (int16_t)(imm << 6) >> 6;
On 2012-10-31 01:44, Peter Maydell wrote:
> On 30 October 2012 15:34, Jia Liu wrote:
>> On Mon, Oct 29, 2012 at 9:40 PM, Jovanovic, Petar wrote:
imm = (int16_t)(imm << 6) >> 6;
>>>
>>> result of a bitwise shift of a signed type and a negative vlaue is
>>> implementation-defined, so you can n
On 29 October 2012 13:36, Jia Liu wrote:
> case OPC_REPL_PH:
> check_dsp(ctx);
> {
> imm = (ctx->opcode >> 16) & 0x03FF;
> imm = (int16_t)(imm << 6) >> 6;
> tcg_gen_movi_tl(cpu_gpr[ret], \
>
On 30 October 2012 15:34, Jia Liu wrote:
> On Mon, Oct 29, 2012 at 9:40 PM, Jovanovic, Petar wrote:
>>> imm = (int16_t)(imm << 6) >> 6;
>>
>> result of a bitwise shift of a signed type and a negative vlaue is
>> implementation-defined, so you can not rely on that.
>>
>
> I think it will take a 10
Hi Petar,
On Mon, Oct 29, 2012 at 9:40 PM, Jovanovic, Petar wrote:
> Hi Jia,
>
>> imm = (int16_t)(imm << 6) >> 6;
>
> result of a bitwise shift of a signed type and a negative vlaue is
> implementation-defined, so you can not rely on that.
>
I think it will take a 10bits signed value sign extend
2012 1:36 PM
To: Jovanovic, Petar
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v12 09/14] target-mips: Add ASE DSP
bit/manipulation instructions
Hi Petar,
On Sun, Oct 28, 2012 at 6:58 AM, Jovanovic, Petar wrote:
> +case OPC_REPL_PH:
> +
Hi Petar,
On Sun, Oct 28, 2012 at 6:58 AM, Jovanovic, Petar wrote:
> +case OPC_REPL_PH:
> +check_dsp(ctx);
> +{
> +imm = (ctx->opcode >> 16) & 0x03FF;
> +tcg_gen_movi_tl(cpu_gpr[ret], \
> +(target_long
+case OPC_REPL_PH:
+check_dsp(ctx);
+{
+imm = (ctx->opcode >> 16) & 0x03FF;
+tcg_gen_movi_tl(cpu_gpr[ret], \
+(target_long)((int32_t)imm << 16 | \
+(uint32_t)(uint16_t)imm
Add MIPS ASE DSP Bit/Manipulation instructions.
Signed-off-by: Jia Liu
---
target-mips/dsp_helper.c | 55 ++
target-mips/helper.h |7 ++
target-mips/translate.c | 249 ++
3 files changed, 311 insertions(+)
diff --git a/target-mips/
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