Hello!
> We also need to update the ACPI table generation code, otherwise
> we will be instantiating a system with a GICv3 and claiming
> in the ACPI tables that it is a GICv2.
I have done everything except this piece. Where can i get any documentation on
how to describe GICv3 in MADT?
Kind r
Hi Pavel,
On 09/04/2015 10:26 AM, Pavel Fedin wrote:
It is more convenient for ITS implementation. I already have the code for it,
and for ITS device it is useful to have two separate sysbus-mmio regions, one
for control and one for translation.
Do you plan posting the ITS patches on the l
Hello!
> Do you plan posting the ITS patches on the list? I am interested in
> reviewing and testing them.
Yes, i do. However i am waiting for prerequisites (base vGICv3 in qemu and ITS
emulation in kernel to get in). I don't like to post patch-on-patch-on-patch
because i'm in doubt anyone wo
Hello!
> Yes, I think that implementation of Hyp mode is very likely in
> the future -- Xilinx want it, for instance.
Ok. Will add it.
> A register at offset 0x1 means 2 64K pages, doesn't it?
> Can you give a more exact reference to the bit of the manual
> you mean?
I have mistaken 4K f
On 4 September 2015 at 15:18, Pavel Fedin wrote:
> Hello!
>
>> I think we need to leave enough space for all of GICC/GICV/GICH
>> (that's 2 pages for GICC, 2 for GICV, 1 for GICH). They're optional
>> in a GICv3, but we may want them for emulation later on and if we
>> haven't left ourselves enou
Hello!
> I think we need to leave enough space for all of GICC/GICV/GICH
> (that's 2 pages for GICC, 2 for GICV, 1 for GICH). They're optional
> in a GICv3, but we may want them for emulation later on and if we
> haven't left ourselves enough space we'll be a bit stuck.
Do we really need this?
On 4 September 2015 at 08:26, Pavel Fedin wrote:
> Hello!
>
>> Why have separate ITS_CONTROL and ITS_TRANSLATION entries, given
>> that the ITS pages are architecturally required to be contiguous
>> and the dt binding doesn't require you to specify the two addresses
>> separately?
>
> It is more
Hello!
> Why have separate ITS_CONTROL and ITS_TRANSLATION entries, given
> that the ITS pages are architecturally required to be contiguous
> and the dt binding doesn't require you to specify the two addresses
> separately?
It is more convenient for ITS implementation. I already have the code
On 26 August 2015 at 11:28, Pavel Fedin wrote:
> Add gic_version to VirtMachineState, set it to value of the option
> and pass it around where necessary. Instantiate devices and fdt
> nodes according to the choice.
>
> max_cpus for virt machine increased to 126 (calculated from redistributor
> spa
Add gic_version to VirtMachineState, set it to value of the option
and pass it around where necessary. Instantiate devices and fdt
nodes according to the choice.
max_cpus for virt machine increased to 126 (calculated from redistributor
space available in the memory map). GICv2 compatibility check
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