The ISA strings we're providing from QEMU aren't actually legal RISC-V
ISA strings, as both the S and U extensions cannot exist as
single-letter extensions and must instead be multi-letter strings.
We're still using the ISA strings inside QEMU to track the availiable
extensions, so this patch just strips out the S and U extensions when
formatting ISA strings.
This boots Linux on top of 4.1-rc3, which no longer has the U extension
in /proc/cpuinfo.
Signed-off-by: Palmer Dabbelt <pal...@sifive.com>
---
target/riscv/cpu.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index f8d07bd20ad7..74f3449c4918 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -501,7 +501,22 @@ char *riscv_isa_string(RISCVCPU *cpu)
char *p = isa_str + snprintf(isa_str, maxlen, "rv%d", TARGET_LONG_BITS);
for (i = 0; i < sizeof(riscv_exts); i++) {
if (cpu->env.misa & RV(riscv_exts[i])) {
- *p++ = qemu_tolower(riscv_exts[i]);
+ char lower = qemu_tolower(riscv_exts[i]);
+ switch (lower) {
+ case 's':
+ case 'u':
+ /*
+ * The 's' and 'u' extensions shouldn't be passed in the device
+ * tree, but we still use them internally to track extension
+ * sets. Here we just explicitly remove them when formatting
+ * an ISA string.
+ */
+ break;
+
+ default:
+ *p++ = lower;
+ break;
+ }
}
}
*p = '\0';
--
2.21.0
