Re: [Qemu-devel] [PATCH v2] hw/armv7m_nvic: Implement byte/halfword access for NVIC SCB_SHPRx registers

2012-10-16 Thread Peter Maydell
On 14 October 2012 19:43, Andre Beckus wrote: > Implement byte/halfword read and write for the NVIC SCB_SHPRx > (System Handler Priority Registers). Do this by removing SHPR word access > from nvic_readl/writel and adding common code to hande all access > sizes in nvic_sysreg_read/write. > > Beca

[Qemu-devel] [PATCH v2] hw/armv7m_nvic: Implement byte/halfword access for NVIC SCB_SHPRx registers

2012-10-14 Thread Andre Beckus
Implement byte/halfword read and write for the NVIC SCB_SHPRx (System Handler Priority Registers). Do this by removing SHPR word access from nvic_readl/writel and adding common code to hande all access sizes in nvic_sysreg_read/write. Because the "nvic_state *s" variable now needs to be declared