[Qemu-devel] [PATCH v2 02/10] target-arm: A64: Fix vector register access on bigendian hosts

2013-12-30 Thread Peter Maydell
The A64 128 bit vector registers are stored as a pair of uint64_t values in the register array. This means that if we're directly loading or storing a value of size less than 64 bits we must adjust the offset appropriately to account for whether the host is bigendian or not. Provide utility functio

Re: [Qemu-devel] [PATCH v2 02/10] target-arm: A64: Fix vector register access on bigendian hosts

2013-12-30 Thread Richard Henderson
On 12/30/2013 08:34 AM, Peter Maydell wrote: > The A64 128 bit vector registers are stored as a pair of > uint64_t values in the register array. This means that if > we're directly loading or storing a value of size less than > 64 bits we must adjust the offset appropriately to account > for whethe