Re: [Qemu-devel] [PATCH v2 07/32] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)

On 02/08/2018 09:31 AM, Alex Bennée wrote: > +DEF_HELPER_3(advsimd_maxh, f16, f16, f16, ptr) > +DEF_HELPER_3(advsimd_minh, f16, f16, f16, ptr) > +DEF_HELPER_3(advsimd_maxnumh, f16, f16, f16, ptr) > +DEF_HELPER_3(advsimd_minnumh, f16, f16, f16, ptr) DEF_HELPER_FLAGS_3 with TCG_CALL_NO_RWG. r~

Re: [Qemu-devel] [PATCH v2 07/32] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)

On 02/08/2018 09:31 AM, Alex Bennée wrote: > This implements the half-precision variants of the across vector > reduction operations. This involves a re-factor of the reduction code > which more closely matches the ARM ARM order (and handles 8 element > reductions). > > Signed-off-by: Alex Bennée

[Qemu-devel] [PATCH v2 07/32] arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)

This implements the half-precision variants of the across vector reduction operations. This involves a re-factor of the reduction code which more closely matches the ARM ARM order (and handles 8 element reductions). Signed-off-by: Alex Bennée -- v1 - dropped the