Re: [Qemu-devel] [PATCH v2 1/1] riscv: Ensure the kernel start address is correctly cast

2019-01-24 Thread Alistair Francis
On Wed, Jan 23, 2019 at 6:00 PM Palmer Dabbelt wrote: > > On Tue, 15 Jan 2019 13:09:28 PST (-0800), alistai...@gmail.com wrote: > > On Mon, Jan 14, 2019 at 2:58 AM Philippe Mathieu-Daudé > > wrote: > >> > >> Hi Alistair, > >> > >> On 1/12/19 2:17 AM, Alistair Francis wrote: > >> > Cast the kernel

Re: [Qemu-devel] [PATCH v2 1/1] riscv: Ensure the kernel start address is correctly cast

2019-01-23 Thread Palmer Dabbelt
On Tue, 15 Jan 2019 13:09:28 PST (-0800), alistai...@gmail.com wrote: On Mon, Jan 14, 2019 at 2:58 AM Philippe Mathieu-Daudé wrote: Hi Alistair, On 1/12/19 2:17 AM, Alistair Francis wrote: > Cast the kernel start address to the target bit length. > > This ensures that we calculate the initrd

Re: [Qemu-devel] [PATCH v2 1/1] riscv: Ensure the kernel start address is correctly cast

2019-01-15 Thread Alistair Francis
On Mon, Jan 14, 2019 at 2:58 AM Philippe Mathieu-Daudé wrote: > > Hi Alistair, > > On 1/12/19 2:17 AM, Alistair Francis wrote: > > Cast the kernel start address to the target bit length. > > > > This ensures that we calculate the initrd offset to a valid address for > > the architecture. > > Can y

Re: [Qemu-devel] [PATCH v2 1/1] riscv: Ensure the kernel start address is correctly cast

2019-01-14 Thread Philippe Mathieu-Daudé
Hi Alistair, On 1/12/19 2:17 AM, Alistair Francis wrote: > Cast the kernel start address to the target bit length. > > This ensures that we calculate the initrd offset to a valid address for > the architecture. Can you add an example of the failure symptoms? > > Signed-off-by: Alistair Francis

[Qemu-devel] [PATCH v2 1/1] riscv: Ensure the kernel start address is correctly cast

2019-01-11 Thread Alistair Francis
Cast the kernel start address to the target bit length. This ensures that we calculate the initrd offset to a valid address for the architecture. Signed-off-by: Alistair Francis Suggested-by: Alexander Graf Reported-by: Alexander Graf --- v2: - Remove old comment hw/riscv/sifive_e.c | 2 +-