On 8/27/19 1:01 PM, Richard Henderson wrote:
> Other constraints, such as rd != 15 or imod != 0, should continue to return
> false so that a (potential) grouped insn can match.
Eh. This is not the answer that the TT example suggests.
So far we are able to order the grouped insns such that
decodi
On 8/27/19 3:32 AM, Peter Maydell wrote:
>> +static bool trans_HVC(DisasContext *s, arg_HVC *a)
>> +{
>> +if (!ENABLE_ARCH_7 || IS_USER(s) || arm_dc_feature(s, ARM_FEATURE_M)) {
>> +return false;
>> +}
>> +gen_hvc(s, a->imm);
>> +return true;
>> +}
>
> I was wondering about
On Mon, 19 Aug 2019 at 22:38, Richard Henderson
wrote:
>
> This fixes an exiting bug with the T5 encoding of SUBS PC, LR, #IMM,
> in that it may be executed from user mode as with any other encoding
> of SUBS, not as ERET.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 119
On 8/23/19 5:03 AM, Peter Maydell wrote:
> On Mon, 19 Aug 2019 at 22:38, Richard Henderson
> wrote:
>
> In subject, typo: "Miscellaneous".
>
>> This fixes an exiting bug with the T5 encoding of SUBS PC, LR, #IMM,
>
> "existing"
>
>> in that it may be executed from user mode as with any other e
On Mon, 19 Aug 2019 at 22:38, Richard Henderson
wrote:
In subject, typo: "Miscellaneous".
> This fixes an exiting bug with the T5 encoding of SUBS PC, LR, #IMM,
"existing"
> in that it may be executed from user mode as with any other encoding
> of SUBS, not as ERET.
Should this paragraph be i
This fixes an exiting bug with the T5 encoding of SUBS PC, LR, #IMM,
in that it may be executed from user mode as with any other encoding
of SUBS, not as ERET.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 119 +
target/arm/a32.decode |
