Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps

2016-02-22 Thread Alistair Francis
On Sat, Feb 20, 2016 at 3:28 AM, Peter Maydell wrote: > On 19 February 2016 at 19:38, Alistair Francis wrote: >> On Fri, Feb 19, 2016 at 6:39 AM, Peter Maydell >> wrote: >>> +/* Check for traps to performance monitor

Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps

2016-02-20 Thread Peter Maydell
On 19 February 2016 at 19:38, Alistair Francis wrote: > On Fri, Feb 19, 2016 at 6:39 AM, Peter Maydell > wrote: >> +/* Check for traps to performance monitor registers, which are controlled >> + * by MDCR_EL2.TPM for EL2 and MDCR_EL3.TPM for EL3.

Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps

2016-02-19 Thread Alistair Francis
On Fri, Feb 19, 2016 at 6:39 AM, Peter Maydell wrote: > Implement the performance monitor register traps controlled > by MDCR_EL3.TPM and MDCR_EL2.TPM. Most of the performance > registers already have an access function to deal with the > user-enable bit, and the TPM

Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps

2016-02-19 Thread Sergey Fedorov
On 19.02.2016 17:39, Peter Maydell wrote: > Implement the performance monitor register traps controlled > by MDCR_EL3.TPM and MDCR_EL2.TPM. Most of the performance > registers already have an access function to deal with the > user-enable bit, and the TPM checks can be added there. We > also need

[Qemu-devel] [PATCH v2 2/2] target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM traps

2016-02-19 Thread Peter Maydell
Implement the performance monitor register traps controlled by MDCR_EL3.TPM and MDCR_EL2.TPM. Most of the performance registers already have an access function to deal with the user-enable bit, and the TPM checks can be added there. We also need a new access function which only implements the TPM