On Thu, 3 May 2018 16:33:25 +0200
Auger Eric wrote:
> > +if (!vdev->no_kvm_ioeventfd &&
> > +addr > PCI_STD_HEADER_SIZEOF && last->added < MAX_DYN_IOEVENTFD +
> > 1) {
> nit: <= MAX_DYN_IOEVENTFD?
Done, also the addr test should be >=, it doesn't make sense to exclude
the first byt
Hi Alex,
On 05/01/2018 06:43 PM, Alex Williamson wrote:
> The NVIDIA BAR0 quirks virtualize the PCI config space mirrors found
> in device MMIO space. Normally PCI config space is considered a slow
> path and further optimization is unnecessary, however NVIDIA uses a
> register here to enable the
On Thu, 3 May 2018 11:36:35 +0800
Peter Xu wrote:
> On Tue, May 01, 2018 at 10:43:32AM -0600, Alex Williamson wrote:
>
> [...]
>
> > @@ -743,6 +843,60 @@ static void vfio_nvidia_quirk_mirror_write(void
> > *opaque, hwaddr addr,
> >addr + mirror->offset, data, size);
On Tue, May 01, 2018 at 10:43:32AM -0600, Alex Williamson wrote:
[...]
> @@ -743,6 +843,60 @@ static void vfio_nvidia_quirk_mirror_write(void *opaque,
> hwaddr addr,
>addr + mirror->offset, data, size);
> trace_vfio_quirk_nvidia_bar0_msi_ack(vdev->vbasedev.na
The NVIDIA BAR0 quirks virtualize the PCI config space mirrors found
in device MMIO space. Normally PCI config space is considered a slow
path and further optimization is unnecessary, however NVIDIA uses a
register here to enable the MSI interrupt to re-trigger. Exiting to
QEMU for this MSI-ACK h
