Also this functions is better invoked by the core than by each and every device. This allows to drop the config_write callbacks from ich and intel-hda.
CC: Alexander Graf <ag...@suse.de> CC: Gerd Hoffmann <kra...@redhat.com> CC: Isaku Yamahata <yamah...@valinux.co.jp> Signed-off-by: Jan Kiszka <jan.kis...@siemens.com> --- hw/ide/ich.c | 8 -------- hw/intel-hda.c | 12 ------------ hw/ioh3420.c | 1 - hw/msi.c | 2 +- hw/pci.c | 3 +++ hw/virtio-pci.c | 1 - hw/xio3130_downstream.c | 1 - hw/xio3130_upstream.c | 1 - 8 files changed, 4 insertions(+), 25 deletions(-) diff --git a/hw/ide/ich.c b/hw/ide/ich.c index 6150ce3..2aaef10 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -116,13 +116,6 @@ static int pci_ich9_uninit(PCIDevice *dev) return 0; } -static void pci_ich9_write_config(PCIDevice *pci, uint32_t addr, - uint32_t val, int len) -{ - pci_default_write_config(pci, addr, val, len); - msi_write_config(pci, addr, val, len); -} - static PCIDeviceInfo ich_ahci_info[] = { { .qdev.name = "ich9-ahci", @@ -130,7 +123,6 @@ static PCIDeviceInfo ich_ahci_info[] = { .qdev.size = sizeof(AHCIPCIState), .init = pci_ich9_ahci_init, .exit = pci_ich9_uninit, - .config_write = pci_ich9_write_config, },{ /* end of list */ } diff --git a/hw/intel-hda.c b/hw/intel-hda.c index 5485745..99d9b98 100644 --- a/hw/intel-hda.c +++ b/hw/intel-hda.c @@ -1170,17 +1170,6 @@ static int intel_hda_exit(PCIDevice *pci) return 0; } -static void intel_hda_write_config(PCIDevice *pci, uint32_t addr, - uint32_t val, int len) -{ - IntelHDAState *d = DO_UPCAST(IntelHDAState, pci, pci); - - pci_default_write_config(pci, addr, val, len); - if (d->msi) { - msi_write_config(pci, addr, val, len); - } -} - static int intel_hda_post_load(void *opaque, int version) { IntelHDAState* d = opaque; @@ -1264,7 +1253,6 @@ static PCIDeviceInfo intel_hda_info = { .qdev.reset = intel_hda_reset, .init = intel_hda_init, .exit = intel_hda_exit, - .config_write = intel_hda_write_config, .qdev.props = (Property[]) { DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0), DEFINE_PROP_UINT32("msi", IntelHDAState, msi, 1), diff --git a/hw/ioh3420.c b/hw/ioh3420.c index 73bc55f..3c28648 100644 --- a/hw/ioh3420.c +++ b/hw/ioh3420.c @@ -71,7 +71,6 @@ static void ioh3420_write_config(PCIDevice *d, pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND); pci_bridge_write_config(d, address, val, len); - msi_write_config(d, address, val, len); ioh3420_aer_vector_update(d); pcie_cap_slot_write_config(d, address, val, len); pcie_aer_write_config(d, address, val, len); diff --git a/hw/msi.c b/hw/msi.c index 09bcdd1..e23f5df 100644 --- a/hw/msi.c +++ b/hw/msi.c @@ -256,7 +256,7 @@ void msi_notify(PCIDevice *dev, unsigned int vector) stl_phys(address, data); } -/* call this function after updating configs by pci_default_write_config(). */ +/* Normally called by pci_default_write_config(). */ void msi_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len) { uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev)); diff --git a/hw/pci.c b/hw/pci.c index 967f812..fc2b555 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1119,6 +1119,9 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) if (range_covers_byte(addr, l, PCI_COMMAND)) pci_update_irq_disabled(d, was_irq_disabled); + + msi_write_config(d, addr, val, l); + msix_write_config(d, addr, val, l); } /***********************************************************/ diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index 075d657..a181291 100644 --- a/hw/virtio-pci.c +++ b/hw/virtio-pci.c @@ -547,7 +547,6 @@ static void virtio_write_config(PCIDevice *pci_dev, uint32_t address, } pci_default_write_config(pci_dev, address, val, len); - msix_write_config(pci_dev, address, val, len); } static unsigned virtio_pci_get_features(void *opaque) diff --git a/hw/xio3130_downstream.c b/hw/xio3130_downstream.c index a587c3e..933a1ee 100644 --- a/hw/xio3130_downstream.c +++ b/hw/xio3130_downstream.c @@ -41,7 +41,6 @@ static void xio3130_downstream_write_config(PCIDevice *d, uint32_t address, pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, address, val, len); - msi_write_config(d, address, val, len); pcie_aer_write_config(d, address, val, len); } diff --git a/hw/xio3130_upstream.c b/hw/xio3130_upstream.c index 9d75449..584ffa2 100644 --- a/hw/xio3130_upstream.c +++ b/hw/xio3130_upstream.c @@ -40,7 +40,6 @@ static void xio3130_upstream_write_config(PCIDevice *d, uint32_t address, { pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); - msi_write_config(d, address, val, len); pcie_aer_write_config(d, address, val, len); } -- 1.7.1